论文和技术资料

For the first time, a comprehensive coupled 2D electrothermal and elastoplastic transient model of a second-generation planar-gate 4H-SiC vertical MOSFET was developed using COMSOL Multiphysics® to evaluate device behavior under extreme short-circuit conditions (T=300-1500 K). Such devices are critical for high-voltage, high-temperature, and high-frequency applications, making their thermal and mechanical robustness a key design priority. This work focuses on identifying failure thresholds in regions most susceptible to thermomechanical stress—namely the interlayer dielectric (ILD) and Al metallization—under extreme transient stress. The simulation results provide insight into internal degradation mechanisms, supporting the development of more robust chips and fast, reliable protection strategies for next-generation smart gate drivers.

In the first stage, the semiconductor behavior was modeled using the Semiconductor Module, capturing temperature- and doping-dependent mobility in 4H-SiC and accounting for interface effects such as fixed charges and traps at the SiC/SiO₂ boundary. A self-consistent transient electrothermal simulation was performed by coupling with the Heat Transfer Module, where internal Joule heating was computed from the power density [1]. Boundary conditions included a heat sink at the drain contact and thermal insulation on vertical edges. All materials included (Al, Ti, SiO₂, poly-Si, and SiC) had wide-range temperature-dependent thermal properties. The Phase Change Material feature modeled Al melting with latent heat and a smoothed Gaussian transition over a 30 K range to ensure numerical stability [2]. After peak heating, a cooling phase returned all domains to room temperature. The heating and cooling steps were concatenated using COMSOL’s Study Sequence tools to form a complete thermal cycle.

Next, the mechanical response was simulated using the Structural Mechanics Module, with the full thermal field mapped as the initial condition. While SiC, poly-Si, and SiO₂ were modeled as linear elastic, Al and Ti were assigned elastoplastic material laws using bilinear kinematic hardening with temperature-dependent properties. Phase-change-induced mechanical softening of Al was implemented over the same 30 K interval [3]. A Rankine damage model was applied to simulate brittle fracture in the ILD, and localized mesh refinement in the ILD region improved accuracy in stress concentration zones. Symmetry conditions were applied to the vertical boundaries, while the bottom edge was fixed [4].

In the final phase, the model was extended for Repetitive Thermomechanical Cycling using parametric and time-dependent solvers by cyclically reapplying thermal profiles, enabling analysis of cumulative stress and damage tracking over multiple power pulses. Early cycles revealed a linear relationship between average crack length, damaged area, and global elastic energy. A follow-up model is currently nearing completion where topside layers—Si₃N₄ and polyimide—are added to the geometry. A Contact Pair with Cohesive Zone Modeling is being implemented to simulate delamination between these layers.

To confirm simulation accuracy, simulation results were validated against experimental short-circuit tests. Stress concentrations and damage evolution from the simulation aligned with experimentally observed cracking at the ILD–poly-Si interface. Predicted Al melting at 3.2 µs and ILD cracking at 3.0 µs closely matched observations, just beyond the 2.5 µs damage-free limit. The critical energy for mechanical failure was calculated to be ~4.46 J/cm².These values serve as key indicators of irreversible damage during high-power switching and demonstrate the model’s predictive capabilities. Such capabilities are essential for future high-reliability power semiconductor design and analysis.